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Volume 12 Issue 07
July 2026
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Author(s)
Priya S. Darne Prof. Y A. Sadawarte
Abstract
In This Paper, Delay And Power Efficient Design For 32-bits Carry Select Adder Has Been Proposed. In Digital Technology, There Is A Large Demand For High-speed Technique. Carry Select Adder (CSLA) Is One Of The Fastest Adders Used In Many Data-processing
Keywords
Carry Select Adder
Brent Kung
Power
Delay
Paper ID
IJSARTV4I422467
Publication Date
April 7, 2018
Research Area
Electronics Engineering