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Volume 12 Issue 07
July 2026
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Author(s)
Nandhini E. Vimal
Abstract
The Timing Elements And Clock Interconnection Networks Such As Flip-flops And Latches, Is One Of The Most Power Consuming Components In Modern Very Large Scale Integration (VLSI) System. The Area, Power And Transistor Count Will Compared And Designed
Keywords
Pulse Triggered Flip Flop Design
Microwind
Dsch2
VLSI
Paper ID
IJSARTV2I63550
Publication Date
June 18, 2016
Research Area
VLSI Design