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Volume 12 Issue 07
July 2026
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Author(s)
Tamil Chindhu S Dr.N.Shanmugasundaram
Abstract
Clock Gating Is One Of The Most Vital Techniques For Reducing Dynamic Power In The Sequential Circuits Where Presence Of Clock Signal At Undesired Instance Is A Major Problem. The Major Power Consuming Components In Electronics Product Is The Systems Cloc
Keywords
Dynamic Power
Clock Gating
Cell
Latch
Flip-flop
LACG
Data Driven
Auto Gated Flipflop
Low Power Consumption
Sequential Circuits.
Paper ID
IJSARTV4I523739
Publication Date
May 29, 2018
Research Area
ECE