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Volume 7, Issue 5 (May 2021)

Novel High Speed Vedic Mathematics Multiplier Using Mathematics

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Volume 12 Issue 07

July 2026

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Author(s)

T.Sowmya K. Anitha G.Vinatha

Abstract

With The Advent Of New Technology In The Fields Of VLSI And Communication, There Is Also An Ever-growing Demand For High-speed Processing And Low Area Design. It Is Also A Well-known Fact That The Multiplier Unit Forms An Integral Part Of Processor Design


Keywords

4:2 Compressors 7:2 Compressor Booth’s Multiplier High Speed Multiplier Modified Booth’s Multiplier UrdhwaTiryakbhyam Sutra Vedic Mathematics

Paper ID

IJSARTV7I548766

Publication Date

May 29, 2021

Research Area

ECE

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