Impact Factor
7.883
Call For Paper
Volume 12 Issue 07
July 2026
Download Paper Format
Copyright Form
Author(s)
Neelam jain Megha chitranshi
Abstract
In This Article A Low Power Carbon Nano Tube Transistor Based Novel 10T Full Adder Cell Is Designed. This Design Is Simulated In 32nm Technology Node Using H-SPICE Simulator. In This Article Multi Threshold Technique Is Used, By Which Leakage Power And Le
Keywords
MTCMOS
Carbon Nano Tube
H-SPICE
Leakage Current
Leakage Power Etc.
Paper ID
IJSARTV3I412979
Publication Date
April 21, 2017
Research Area
ECE