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Volume 11, Issue 3 (March 2025)

Fpga Implementation Of Low Power Parallel Multiplier

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Volume 12 Issue 07

July 2026

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Author(s)

U.Meiyarasan G.Sathishkumar M.Selvakumar Dr. J.Rangarajan

Abstract

In The Fast Growing Communication Field, Requirements Of Low Power Designs Are Increasing To Reduce The Power Losses And Decrease The Thermal Losses In The Same Ratio.Multiplier Is An Arithmetic Circuit That Is Extensively Used In Common DSP And Communica


Keywords

Low Power Multiplier Reduced Switching.

Paper ID

IJSARTV11I3102785

Publication Date

March 12, 2025

Research Area

ECE

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