Energy-efficient Vlsi Architectures For Intelligent Biomedical Signal Processing: Review

Abstract

Recent Advancements In VLSI Technology Have Significantly Transformed Biomedical Signal Processing Systems By Enabling Ultralow-power, Compact, And Intelligent Hardware Platforms For Continuous Health Monitoring. In Particular, Electrocardiogram (ECG) And Electroencephalogram (EEG) Signal Processing Applications Have Benefited From The Development Of Energy-efficient Application-specific Integrated Circuits (ASICs), Mixed-signal System-on-chips (SoCs), And FPGA Accelerators. Ultralow-power ECG Application-specific Integrated Circuits (ASICs) Operating In The Nanowatt Range Demonstrate Robustness Against Motion Artifacts And Support Long-term Wearable Monitoring [1]. Energy-efficient Application-specific Integrated Circuits Fabricated Using Deep-submicron CMOS Technologies Further Enable Real-time Cardiovascular Disease Detection With Minimal Power Consumption [2]. Recent Research Has Also Highlighted The Integration Of Artificial Intelligence Techniques, Such As Convolutional Neural Networks (CNNs), Long Short-term Memory (LSTM) Networks, And Data-efficient Neural Models Into VLSI Architectures For Accurate Heartbeat And Arrhythmia Classification [3], [14], [15]. In Addition, Low-power EEG Acquisition SoCs With On-chip Feature Extraction And Compression Engines Have Been Developed To Support Ambulatory And Implantable Neural Monitoring Systems [8], [9]. FPGA-based Accelerators Provide Flexible Platforms For Real-time Biomedical Signal Analysis And Serve As Comparative Benchmarks For Application-specific Integrated Circuit (ASIC) Designs [21], [25]. This Paper Presents A Comprehensive Review Of VLSI-based Biomedical Signal Processing Systems, Focusing On Architectural Trends, Power-area Trade-offs, AI-enabled Hardware, Challenges, And Future Research Directions For Next-generation Wearable And Implantable Healthcare Devices.

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