Impact Factor
Call For Paper
Volume 12 Issue 07
July 2026
Author(s)
Abstract
The Rapid Growth Of System-on-Chip (SoC) Technologies Has Increased Their Vulnerability To Advanced Physical And Power Side-channel Attacks, Which Can Compromise The Security Of Integrated Circuits. Conventional Countermeasures Often Involve Complex Fabrication Processes And High Area Overhead, Making Them Difficult To Implement And Verify. This Paper Presents A VLSI-based Hardware Detection System Designed To Identify And Mitigate Power Side-channel And Physical Attacks In Real Time. The Proposed Approach Integrates Clock-based And Voltage-based Sensing Mechanisms Along With Dynamic Pattern Matching To Detect Anomalies Caused By Attacks Such As Voltage Manipulation, Replay Attacks, And Unauthorized Probing. The System Is Implemented Using FPGA-based Architecture And Validated Through Simulation Using ModelSim. Experimental Results Demonstrate That The Proposed Detection Framework Achieves High Accuracy With Low Overhead, Ensuring Minimal Impact On System Performance. The Design Offers A Scalable And Efficient Solution That Can Be Seamlessly Integrated Into Existing SoC Architectures, Enhancing Hardware Security And Reliability In Modern Embedded Systems.
Keywords
Paper ID
IJSARTV12I4105102
Publication Date
April 21, 2026
Research Area
Electronics And Communication Engineering