Impact Factor
7.883
Call For Paper
Volume 12 Issue 07
July 2026
Author(s)
NIRMALADEVI J V. ANNAPOORANI
Abstract
CMOS Technology Is Evolving Propose And Demonstrate A Serializer/deserializer (SerDes) Toward The Testing Of Large Scale GDI Circuits With Delay-line Clocking. A SerDes, A Pair Of A Serializer (parallel-to-serial Converter) And A Deserializer (serial-to-p
Keywords
Adiabatic Logic
GDI Technique
Low Power
High Frequency
SerDes.
Paper ID
IJSARTV10I175482
Publication Date
January 8, 2024
Research Area
Electronics And Communication Engineering