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Volume 2, Issue 3 (March 2016)

Area Efficient Booth Recoder For Multiply And Accumulation Operation

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7.883
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Volume 12 Issue 07

July 2026

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Author(s)

Munjaji Bhise Suresh Garud Nikhil Hole Prof. A. S. Deshpande

Abstract

Complex Arithmetic Operations Are Most Widely Used In Digital Signal Processing (DSP) Applications. In This Project We Focus On Optimizing Design Of Fused Add-Multiply (FAM) Operator For Increasing Performance. In This Project We Investigate Technique


Keywords

FAM Unit SMB Radix-4 Recoder.

Paper ID

IJSARTV2I31968

Publication Date

March 25, 2016

Research Area

VLSI

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