Impact Factor: 7.883
Submit Paper
Volume 5, Issue 3 (March 2019)

Analysing The Performance Of Low Power High Speed Full Adders Using Strained Silicon Cmos Technology

Impact Factor
7.883
Call For Paper
Volume 12 Issue 07

July 2026

Download Paper Format
Copyright Form
Share on:

Author(s)

Dr.T.Ravichandran S.Naveena S.Monishraj M.Ramkumar

Abstract

In Most Of The Digital Circuits, Communication Systems And Digital Signal Processing, Adders Play A Major Role Since They Are The Basic Blocks. In This Paper, The Performance Of Full-adder (FA) Circuits Has Been Studied. The Full Adder Circuits Were Desig


Keywords

Delay Full-adder (FA) Power Consumption.

Paper ID

IJSARTV5I329862

Publication Date

March 28, 2019

Research Area

ECE

Submit Your Paper to IJSART

Join the global research community with IJSART. Submit your paper, share your work, and gain worldwide recognition!