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Volume 2, Issue 11 (November 2016)

A Review On Instruction Set Architecture And Clock Gating Signals For Low Power Risc Processor

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7.883
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Volume 12 Issue 07

July 2026

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Author(s)

Asha Rani M Parvathi S. J

Abstract

The Battery Life Of Portable Electronics Today Makes Power And Energy Consumption Vital Factors. This Paper Presents A Description Of Instruction Set Architecture Design To Reduce Power Consumption And Clock Gating Signals To Reduce The Power Utilizat


Keywords

Paper ID

IJSARTV2I116005

Publication Date

November 7, 2016

Research Area

CSE

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