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Volume 4, Issue 4 (April 2018)

64 Bit Vedic Multiplier With High Fault Coverage

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Volume 12 Issue 07

July 2026

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Author(s)

Renuka Talekar Mayuri Chawla Parinay Lavatre

Abstract

The 64 Bit Vedic Multiplier Using Urdhava Tiryakbhyam Method Is Proposed. The ALU Is The Heart Of Any Processor Or The Any Complex System .To Increase The Speed Of Any System, It Is Required To Increase The Speed Of ALU, But With Low Power Consumption And


Keywords

Vedic Multiplier Urdhva Tiryakbhyam Method Vedic Mathematics 64 Bit Multiplier Vedic Mathematics.

Paper ID

IJSARTV4I422663

Publication Date

April 13, 2018

Research Area

VLSI

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